1. Field of Industrial Application
The present invention relates to a multi-line selection drive method which can realize the gray shading. More particularly, the present invention concerns a segment driver for driving a liquid crystal display panel through the multi-line selection drive method, a display controller and a liquid crystal display device.
2. Prior Art
In passive matrix type liquid crystal display panels, it is desirable that it takes a liquid crystal material having its increased speed of response for dealing with the display of animation. However, if the speed of response in the liquid crystal increases, there is caused a phenomenon known as a frame response which leads to such a problem as flicker or reduction of contrast. To overcome such a problem, there is one conventional technique known as a multi-line selection drive method (MLS) for simultaneously selecting a plurality of scanning electrodes.
In the MLS selection drive method, the gray shading has been generally realized by the frame rate control (FRC). However, the frame rate control tends to produce the flicker. To overcome such a problem, there have been proposed the pulse width modulation as in Japanese Patent Laid-Open No. 5-100642 or Japanese Patent Laid-Open No. 7-199863 and the voltage modulation. The pulse width modulation (PWM) of the prior art in the MLS will now be described with reference to FIGS. 1A to 4 of the accompanying drawings.
Four gray shades in the simultaneous selection of two lines will first be described. Four gray shades can be represented by gray shades data of two bits. As shown in FIG. 1A, it is now assumed that the gray shades data in pixels 133 and 134 at the intersection between a scanning electrode 131 and a signal electrode 132 is (01). If the OFF and ON states of a liquid crystal are respectively designated 1 and -1, "0" being the higher order bit in the gray shades data (01) will be represented by "1" and "1" being the lower order bit will be represented by -1. As shown in FIG. 1B, this prior art divides the gray shades data into the higher and lower order parts to perform the matrix calculation for the gray shades data and the orthogonal function (e.g., a matrix represented by 1 and -1). More particularly, the gray shades data at the pixels 133 and 134 is divided into the higher and lower order bits as shown by 135. The matrix calculation for each of these higher and lower order bits and the orthogonal function 136 is then performed. The matrix calculation provides two results 137 which are separately outputted toward first and second fields (which will respectively be referred to 1f and 2f). The results of the matrix calculation take one of the values 2, 0 and -2. Each result is then outputted toward a segment (signal electrode) depending on the voltage level Vx, 0 or -Vx. The voltage waveform in the segment output is shown in FIG. 2. Reference numeral 141 represents voltage level at the segment output; 142 times axes; and 143 and 144 fields. As shown in FIG. 2, a section a shown by 145 has a length two times longer than another section b shown by 146. In other words, the pulse width corresponding to the higher order bit in the gray shades data is two times the pulse width corresponding to the lower order bit.
For simplification, FIG. 2 shows as if continuous between the pulse corresponding to the lower order bit in the field 1f and the pulse corresponding to the higher order bit in the field 2f, but the pulses are actually separated from each other.
Next, four gray shades in the simultaneous selection of four lines will be described. FIG. 3 shows the process of calculation in this case. With the simultaneous selection and drive of four lines, the result 137 of the matrix calculation for the orthogonal function 136 may take any one of values 4, 2, 0, -1 and -4. Each of these results will be outputted toward the segment depending on the voltage level of 2Vx, Vx, 0, -Vx or 2Vx. The voltage waveform in this segment output ass shown in FIG. 4. For simplification, FIG. 4 also shows to be continuous between the pulses corresponding to the lower and higher order bits in the fields 1f and 2f, respectively.
However, such a prior art technique raises the following problem as the number of gray shades and lines to be simultaneously selected increases. As the number of gray shades increases, the number of transitions C1 to C7 in FIG. 4 correspondingly increases. The difference between the voltage levels as well as the orientation of variation in the segment waveform variation at the transitions C1 to C7 become random. The distortion of the segment waveform as well as the magnitude and orientation of noise superimposed on the common (scanning electrode) in the variation of segment waveform also become random. Such a noise causes a crosstalk resulting in great reduction of the quality in display. To overcome such a crosstalk, there may be considered a technique used with the idea of Japanese Patent Laid-Open No. 62-183434 for offsetting the noise by changing the position of pulse division in the PWM backward and forward, for example, for each frame. However, it is difficult to apply such a technique to the prior art since in the prior art the position of transition, the difference between voltage levels in the variation of the waveform at the transition and the orientation of variation are random.
In this prior art, further, the number of voltage levels also increases as the number of lines to be simultaneously selected increases. For example, the simultaneous selection of four lines requires five voltage levels while the simultaneous selection of five lines requires six voltage levels. As the number of voltage levels increases, the number of power supplies required by the system also increases. This further results in increase of the number of output transistor elements in the segment driver with a control circuit for each output transistor. This increases the manufacturing cost.